1. Field of the Invention
The present invention relates to a semiconductor integrated circuit (IC), more particularly to an IC of a
semi-custom type in which prefabricated circuit elements are suitably wired in accordance with individual user needs during the IC production process by using, for example, metal sputtering.
2. Description of the Prior Art
One type of such an IC is a masterslice gate array large-scale integrated circuit (LSI), comprising a bulk including a plurality of basic cells arranged in a plurality of arrays. The wiring inside each basic cell and between each basic cell can be designed automatically with the aid of a computer, to produce many varieties of products from one type of bulk.
A typical masterslice gate array LSI is fabricated as follows. First, an inner cell region is located at the center portion of the surface of a substrate. In this region, a plurality of inner cells, each provided with a plurality of circuit elements, are arranged in a plurality of arrays. Second, an outer cell region, i.e. an input/output (I/O) buffer cell region, is located close to and along a peripheral portion of the surface of the substrate. In this region, a plurality of outer cells, i.e. I/O cells, each provided with a plurality of circuit elements, are arranged. Each of the I/O cells achieves operation for a level conversion between signals appearing in the inner cells and signals appearing outside the masterslice gate array LSI. Third, at least a first wiring layer and a second wiring layer are provided as multilayers located on and above the substrate for distributing lines between the circuit elements. The circuit elements of the inner cells are suitably connected by lines distributed on the first and second wiring layers so as to create desired logic circuits. Power belts are also distributed on the second wiring layer along and above the I/O cell region.
In the above-mentioned typical masterslice gate array LSI, the I/O cell region functions only for level conversion. Thus, the efficiency of utilization of the circuit elements on the LSI chip has not been that high.